Anwesha Singh
Reutlingen
Summary
Motivated Physical Design Engineer with two years of Experience in integrated Circuit Design.Proficient in Design Compiler,IC compiler II and committed to deliver high-Quality Designs.Seeking a challenging role to contribute technical expertise to innovative engineering Projects.
Overview
2
2
years of professional experience
Work History
Physical Design Engineer
eInfochips(An Arrow Company)
12.2021 - 01.2023
- Addressed design challenges and evaluated alternative design models to meet project requirements.
- Drafted documentation detailing design requirements and technical specifications.
- Used Design Complier and IC compiler II to meet design specifications for functional prototypes.
- Collaborated with cross-functional teams to conceptualize and refine product concepts.
Physical Design Intern
Intel Technology India Pvt. Ltd.
08.2020 - 07.2021
- Assisted in various physical design stages in Block Execution, including e.g. partitioning, floor planning (macro placement), pin placement, Static Timing Analysis (setup and hold check)
- Contributed to synthesis phase of block and performed timing Analysis
- Gained practical experience with DC and ICC2 compiler tool, cadence’s Innovus tool
Education
Masters of Technology - Electronics And Communications Engineering
Manipal Institute of Technology, MAHE
Manipal,Karnataka09.2021
Bachelor of Technology - Electronics And Communication Engineering
Guru Nanak Institute of Technology
Kolkata07.2018
Skills
- Strong understanding in the RTL to GDSII flow or design implementation
- Good Understanding of block level Physical Design and Verification concepts like Floor planning, CTS, STA, DRC/LVS, DFM etc
- Practical exposure to Physical Design tools from IC Compiler, Design Compiler, Primetime, IC Validator tools
- Basic scripting to improve layout efficiency (Tcl)
- Good in concepts related to synthesis, place and route, CTS and timing convergence
- Good knowledge and experience in Block-level Floor-planning and Physical verification
- Working experience with tools like ICC and DC
- Strong knowledge in standard place and route flows ICC/Synopsys flows preferred
- Well versed with timing constraints and STA
- Ability to multi-task and flexibility to work in global environment
- Good knowledge of Windows 7, 8 and Linux
- Having knowledge on Digital Electronics and CMOS
Languages
English
Upper intermediate (B2)
Bengali
Bilingual or Proficient (C2)
Hindi
Intermediate (B1)
Timeline
Physical Design Engineer
eInfochips(An Arrow Company)
12.2021 - 01.2023
Physical Design Intern
Intel Technology India Pvt. Ltd.
08.2020 - 07.2021
Masters of Technology - Electronics And Communications Engineering
Manipal Institute of Technology, MAHE
Bachelor of Technology - Electronics And Communication Engineering
Guru Nanak Institute of Technology
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