Arjun A B
Hamburg
Summary
Driven Edge AI Engineer specializing in Deep Learning Accelerators and SoC architectures. Proficient in Verilog, C++, and EDA tools like Vivado, I excel in FPGA prototyping and delivering efficient, reliable AI solutions. Passionate about pushing the boundaries of AI and Computer Vision.
Overview
2
2
years of professional experience
1
1
Certification
Work History
Edge AI Developer
SandLogic Technologies Pvt. Ltd.
Bangalore
09.2022 - 09.2024
- Precise register control of the AD9364 Transceiver required efficient communication.
- Developed an SPI-based communication system for the AD9364 transceiver.
- Enabled efficient read/write operations, facilitating precise register control.
- Capturing and processing high-quality image data from a CSI2 MIPI camera system on ZCU104 required specialized hardware and software integration.
- Designed and implemented a high-performance CSI2 MIPI camera system, including a dedicated MIPI circuit with specialized filters, integrated a Video Codec Unit (VCU) for frame processing, and developed custom IP blocks.
- Achieved seamless frame handling, enabling real-time video streaming and processing through gstreamer, and created a tailored operating system(Petalinux) for robust camera interaction.
- Deploying deep learning applications on PolarFire SoC FPGA Icicle Kits required specific configurations and tool proficiency.
- Configured the RISC-V processor using the MSS configurator tool, mastered the Libero SoC tool and PolarFire SoC, and implemented a Deep Learning Accelerator.
- Gained comprehensive knowledge of the PolarFire SoC platform, enabling efficient deployment of AI applications.
- Standard system-on-chips (SoCs) lacked the processing power for demanding deep learning applications.
- Integrated a Deep Learning Accelerator into the Incore Chromite-H core (RISC-V SoC) on a Zynq Ultrascale+ MPSoC ZCU104 FPGA, designing a Multi-Port Memory Controller (MPMC) to enable shared DDR memory access, utilizing AXI protocol.
- Enabled the execution of complex DL models on the FPGA, optimized performance through Vivado strategies, and successfully ported kernel drivers and runtime to the RISC-V Linux kernel, significantly increasing processing capabilities.
- Low-power microcontrollers had limited resources for complex tasks like ECG analysis, making real-time health monitoring challenging.
- Implemented TinyML to detect abnormal ECG signals and identify different heart conditions (Arrhythmia) on an STM32 Cortex-M4 microcontroller, optimizing for low-latency embedded systems.
- Achieved 98% model accuracy with a minimal latency of 36.424ms, successfully deploying the solution with 256Kb of Flash memory, enabling real time health monitoring.
- Manual toll collection was inefficient and prone to errors, leading to traffic congestion and revenue loss.
- Developed an automatic toll collection system using deep learning, including collecting and analyzing a dataset of 3,500+ Indian vehicle images across 4 classes, and implementing YOLO for vehicle recognition on FPGA hardware.
- Achieved a model accuracy of 97.2%, streamlining toll collection and reducing traffic delays.
- Dot printed characters on product packaging were difficult to read with standard OCR.
- Increased the ability to read and process dot matrix printed characters.
- Developed a system to recognize dot printed characters on everyday products utilizing image processing.
Edge AI Intern
SandLogic Technologies Pvt. Ltd.
Bangalore
04.2022 - 09.2022
- Understanding the basics of AI and Designing deep learning neural nets
- Data collection and collation for training the model
- Data annotation and labeling using make sense.ai
- Training, Validation, and Testing for NMIST
- Inference check
- Autopilot system for cars with Advanced Driver Assistance System
Education
Master of Science - Microelectronics And Microsystems
Technische Universität Hamburg
Hamburg, Germany03-2027
Bachelor of Engineering -
Vidyavardhaka College of Engineering
Mysore, India07.2022
Skills
- Verilog/VHDL Proficiency
- C
- Bash
- FPGA Programming/Development
- Timing Analysis
- Vivado/Libero SoC
- Embedded Systems Design
- JTAG Debugging
- DDR Memory Interfaces
- SoC Architecture
- Digital Signal Processing
- High-Level Synthesis
- RF engineering
- Agile methodologies
Languages
Kannada, English, C2, C2, C2, C2, C2, German, A2, A1, A1, A2, A2
Personal Information
- Date of Birth: 05/12/00
- Nationality: Indian
Accomplishments
- Best Paper Presenter Award at Second International Conference on Advances in Management, Engineering & Technology (ICAMET-2022) (06/2022)
Certification
- Programming for Everybody (03/2021 - 04/2021)
- Intel Distribution of OpenVINO Toolkit (04/2021)
- Second International Conference on Advances in Management, Engineering & Technology (ICAMET-2022) (06/2022)
• 2022 ACM/IEEE TinyML Design Contest at ICCAD
Timeline
Edge AI Developer
SandLogic Technologies Pvt. Ltd.
09.2022 - 09.2024
Edge AI Intern
SandLogic Technologies Pvt. Ltd.
04.2022 - 09.2022
Master of Science - Microelectronics And Microsystems
Technische Universität Hamburg
Bachelor of Engineering -
Vidyavardhaka College of Engineering
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