Summary
Overview
Work History
Education
Skills
Accomplishments
Extra Curricular
Timeline
Generic

James O’Sullivan

Analog Design Engineer
Cashel

Summary

I am an accomplished analog design engineer, specializing in PHY transceiver architectures and analog IP in advanced nodes. A background education in semiconductor physics and quantum mechanics gives me an edge over electronic engineering graduates when it comes to understanding low-level device operation. I am proficient in Cadence Virtuoso Studio and Spectre analog simulator and adept at driving quality, performance and consistency in my daily work via rigorous, comprehensive simulation coverage and regular, extensive design reviews.

Overview

2
2
years of professional experience

Work History

Analog Design Engineer

Cadence Design Systems
08.2023 - Current
  • Design and simulation of transceiver architectures on leading-edge FinFET and GAAFET nodes
  • Statisitcal analysis of GAAFET device characteristics for use in novel reference generator topologies
  • Extensive PVT simulation coverage to guarantee performance in all conditions
  • Port existing IP to advanced technologies, enhancing product performance while maintaining reliability
  • Post-silicon validation flow, liaising with validation engineers to compare performance and reliability of test chips with simulation and debug discrepancies
  • Direct contact with high-profile customers, providing progress updates and incorporating feedback to improve designs and increase customer satisfaction
  • Design for optimal power, performance and area
  • Conduct regular design and layout reviews with external topic experts to drive quality and consistency of products, to ensure adherance to deadlines and to mitigate overall risk
  • Automation and scripting of manual simulation processes with Python, Bash, etc. to improve efficiency and increase designer bandwidth

Education

Physics & Mathematical Sciences

University College Cork
08-2023

Leaving Certificate -

Cashel Community School
Tipperary
04.2001 -

Skills

Analog IC design and simulation with Cadence Virtuoso

Leading-edge tehnologies

DDR and HBM memory IP

Transceiver architectures

Differential and single-ended amplifier design

Semiconductor device physics

Accomplishments

  • Driving company sponsorship of student teams in Trinity College Dublin and MTU Cork taking part in Formula Student UK engineering competition every year, where teams design and manufacture cars compliant with strict Formula regulations
  • Presenting work on leading-edge device characterization at Cadence Innovation Conference 2024

Extra Curricular

  • Huge motorsport fan, having attending Formula 1 races yearly for the past 3 years
  • Passionate about music, spending hours on the piano and acoustic guitar in my spare time
  • Brand ambassador, attending marketing events and college open days

Timeline

Analog Design Engineer

Cadence Design Systems
08.2023 - Current

Leaving Certificate -

Cashel Community School
04.2001 -

Physics & Mathematical Sciences

University College Cork
James O’SullivanAnalog Design Engineer