Swetaki Chatterjee

Effective at planning and conducting high-quality research with experience in modelling and simulating emerging non-volatile memories. Demonstrated ability to thoroughly present the research output with publications in top-tier journals and conferences. Good verbal and written communication skills with an organized nature and dedication to ethical and accurate work.

• Analyzed the suitability of dual-port asymmetric double-gated FeFET for Multi-level-Cell storage considering the variability in intermediate states.

S. Chatterjee, S. Thomann, K. Ni, Y. S. Chauhan and H. Amrouch, "Comprehensive Variability Analysis in Dual-Port FeFET for Reliable Multi- Level-Cell Storage," in IEEE Transactions on Electron Devices, 2022, doi: 10.1109/TED.2022.3192808.

• Conducted TCAD simulations to verify the principle and working of dual port FeFET with asymmetric double gate.

Z. Jiang, Yi Xiao, S.Chatterjee, H. Mulaosmanovic, S. Duenkel, S. Soss, et al., "Asymmetric Double-Gate Ferroelectric FET to Decouple the Tradeoff Between Thickness Scaling and Memory Window," 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2022, pp. 395-396, doi: 10.1109/VLSITechnologyandCir46769.2022.9830172.

• Developed a fast, reliable, and physics-based compact model of Ferroelectric FDSOI transistors.

S. Chatterjee, S. Kumar, C.K Dabhi, Y. S. Chauhan, and H. Amrouch., " Ferroelectric FDSOI FET Modeling for Memory and Logic Applications.", Solid-State Electronics (SSE’22) Special issue for Letters from SISPAD '22 (submitted)

• Developed a True Random Number Generator using Ferroelectric Tunnel Junctions.

S.Chatterjee, N. Rangarajan, S. Patnaik, D. Rajsekharan, O. Sinanoglu, and Y. S. Chauhan, "Ferrocoin: Ferroelctric Tunnel Junction based True Random Number Generator", submitted to IEEE Transactions on Emerging Topics in Computing (TETC). (under revision)