A motivated and detail-oriented young professional with hands-on experience in writing Python scripts for ASIC validation and enhancing debug capabilities. Skilled in developing automation tools and improving workflow efficiency through scripting. Passionate about learning new technologies and continuously expanding technical expertise to contribute effectively in dynamic and fast-paced environments.
Python
VHDL
System Verilog
C/C
Spyder
Visual Studio Code
Github
Tortoise SVN
Cadence SimVision
Analog Validation Framework
ASIC Validation
Linux
Ubuntu
MATLAB
LABVIEW